The 2nd HiPEAC Workshop on
Design for Reliability (DFR’10)

January 24th, 2010 Pisa, ITALY

Organized in conjunction with The 5th International Conference on High Performance and Embedded Architectures and Compilers, January 25-27, 2010 Pisa, ITALY
http://www.hipeac.net/conference/

Home
Call For Papers
Committees
Important Dates
Paper Submission
Registration
Program Schedule
HiPEAC Home

 

Organizing Committee

Alex Orailoglu (University of California, San Diego)
Maria K. Michael (University of Cyprus)

Theocharis Theocharides (University of Cyprus)
 

Technical Program Committee

Christiana Bolchini, Politecnico di Milano, ITALY

Veerle Desmet, Ghent University, BELGIUM

Oğuz Ergin, TOBB University of Economics and Technology, TURKEY

Babak Falsafi, EPFL, SWITZERLAND

Dimitris Gizopoulos, University of Piraeus, GREECE

Said Hamdioui, Delft University of Technology, NETHERLANDS

Mary Jane Irwin, Pennsylvania State University, USA

Sandip Kundu, University of Massachusetts, Amherst, USA

Peter Marwedel, Technische Universität Dortmund, GERMANY
Maria K. Michael, University of Cyprus, CYPRUS
Shubu Mukherjee, Intel Corporation, USA
Helia Naeimi, Intel Corporation, USA

Alex Orailoglu, University of California, San Diego, USA
Yannakis Sazeides, University of Cyprus, CYPRUS

Theocharis Theocharides, University of Cyprus, CYPRUS

Xavier Vera, Intel Corporation, SPAIN

Dong Xiang, Tsinghua University, CHINA

Jason Xue, City University of Hong Kong, HONG KONG